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Publications

“Simulation of statistical variability in 18 and 13nm bulk MOSFETs”
A. R. Brown, “Simulation of statistical variability in 18 and 13nm bulk MOSFETs”. et al. Intel European Research and Innovation Conference, Leixlip, Ireland, October 2010
“Electronic design paradigms in the technologies of the year 2020”
C. Garcia, F. Moll and A. Rubio, “Electronic system design paradigms in the technologies of the year 2020”, Int. Soc. Mater. Eng. Resour. Vol. 17, No. 2, (Sept. 2010) DOI: 10.5188/ijsmer.17.87
"TCAD simulation of statistical variability"
A. R. Brown, "TCAD simulation of statistical variability" at Workshop on Simulation and Characterization of Statistical CMOS Variability and Reliability, Bologna (September 2010). DOI: No identifier
"Cache Design Under Spatio-Temporal Variability"
S. Ganapathy, R. Canal, A. González, A. Rubio, "Cache Design Under Spatio-Temporal Variability", Intel 2010 European Research and Innovation Conference, Braunschweig (Germany), September 2010
"MODEST : A Model for Energy Estimation under Spatio-Temporal Variability"
S. Ganapathy, R. Canal, A. González, A. Rubio, "MODEST : A Model for Energy Estimation under Spatio-Temporal Variability", Proc. of the IEEE Low Power Electronics and Design International Symposium (ISLPED), pp. 129-134, August 2010. DOI: 10.1145/1840845.1840873
“A comprehensive compensation technique for process variations and environmental fluctuations in digital integrated circuits”
D. Andrade, A. Calomarde, S.D. Cotofana and A. Rubio. “A comprehensive compensation technique for process variations and environmental fluctuations in digital integrated circuits.”, IEEE Proceedings on Midwest Symposium of Circuit and Systems, pp. 630-634, August 2010. DOI: 10.1109/MWSCAS.2010.5548578
”Turtle Logic: a new design metholodology of nanoscale digital circuits”
García, L..; Calomarde, A.; Moll, F. & Rubio, A.,”Turtle Logic: a new design metholodology of nanoscale digital circuits”. IEEE Proceedings on Midwest Symposium of Circuit and Systems, pp. 422-426, August 2010. DOI: 10.1109/MWSCAS.2010.5548845
”Turtle: a new design metholodology for high noise low signal level scenarios.”
García, L..; Calomarde, A.; Moll, F. & Rubio. "Turtle: a new design metholodology for high noise low signal level scenarios.”, A. IEEE Proceedings on Midwest Symposium of Circuit and Systems, August 2010.
“A holistic approach for statistical analysis of SRAM”
Zuber, P.; Dobrovolny, P. and Miranda Corbalan, M., “A holistic approach for statistical analysis of SRAM”. Proceedings of the 47th ACM/IEEE Design Automation Conference ‐ DAC. 13‐18 July 2010; Anaheim, CA, USA, pp.717-724. ISBN: 978-1-4244-6677-1 (IEEE Xplore)
“Statistical SRAM analysis for yield enhancement”
Zuber, P.; Miranda Corbalan, M.; Dobrovolny, P.; van der Zanden, K. and Jung, J., “Statistical SRAM analysis for yield enhancement”. Design, Automation and Test in Europe Conference ‐ DATE. 8‐12 March 2010; Dresden, Germany 2010, pp.57-62. ISBN: 978-3-9810801-6-2
"Circuit Propagation Delay Estimation Through Multivariate Regression-Based Modeling Under Spatio-Temporal Variability"
S. Ganapathy, R. Canal, A. González, A. Rubio. "Circuit Propagation Delay Estimation Through Multivariate Regression-Based Modeling Under Spatio-Temporal Variability." Proc. of the IEEE Design Automation and Test in Europe Conference (DATE), pp.417-422, March 2010 (Dresden, Germany). DOI: 10.1109/DATE.2010.5457167
"Parametric Failure Analysis of Embedded SRAMs using Fast & Accurate Dynamic Analysis"
E. I. Vatajelu, G. Panagopoulos, K. Roy, J. Figueras. "Parametric Failure Analysis of Embedded SRAMs using Fast & Accurate Dynamic Analysis". IEEE ETS 2010, pp 69-74. DOI: 10.1109/ETSYM.2010.5512778
"Statistical Analysis of SRAM Parametric Failure under Supply Voltage Scaling"
E. I. Vatajelu, J. Figueras, "Statistical Analysis of SRAM Parametric Failure under Supply Voltage Scaling". IEEE AQTR 2010, pp. 1-6. DOI: 10.1109/AQTR.2010.5520825