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CASTNESS 2013 organized by TRAMS in Campus Nord in Barcelona, June 17th
Located in Events
C. García and A. Rubio, “A comparative variability analysis for CMOS and CNTFET 6T SRAM cells”, IEEE Int. Midwest Symp. on Circuits and Systems (MWSCAS), pp.1-4, Seoul August 2011. DOI: 10.1109/MWSCAS.2011.6026572
Located in Publications
I. Vatajelu, J, Figueras, “Transient noise failures SRAM cells dynamic metric”, IEEE Asian Test Symposium, New Delhi, 2011, pp. 413-418. DOI: 10.1109/ATS.2011.64
Located in Publications
X. Wang, A. R. Brown, B. Cheng and A. Asenov, “Statistical Variability and Reliability in Nanoscale FinFETs”, International Electron Devices Meeting (IEDM), Washington D.C., December 2011, pp. 5.4.1-5.4.4. DOI: 10.1109/IEDM.2011.6131494
Located in Publications
B. Cheng, A.R. Brown, X. Wang, A. ASenov, “Statistical variability stydy of extreme-scaled SOI Fin-FET devices”, Silicon Nanoelectronics Workshop, Honolulu, June 10-11, pp. 69-70, 2012. DOI: 10.1109/SNW.2012.6243343
Located in Publications
M. Neagu, L. Miclea, “Modified Berger codes for on-line DRAM repair strategies”, IEEE AQTR, 2012, pp. 296-301. May 2012. DOI: 10.1109/AQTR.2012.6237720
Located in Publications
E. Amat, et al., “Analysis of FinFET technology on memories", IEEE Int. On-line Test Symposium, p. 169, 2012, p. 169. DOI: 10.1109/IOLTS.2012.6313866
Located in Publications
G. Upasani, X. Vera, A. Gonzalez, “Setting and error detection infrastructure with low cost acoustic wave detectors”, International Symposium on Computer Architecture (ISCA 2012), pp. 333-343. DOI: 10.1145/2366231.2337198
Located in Publications
S. Ganapathy, R. Canal, D. Alexandrescu, E. Costenaro, A. Gonzalez, A. Rubio, “A novel variation-tolerant 4T-DRAM with enhanced soft-error tolerance”, ICCD 2012, pp. 472-477. DOI: 10.1109/ICCD.2012.6378681
Located in Publications
E. Amat et al., “Impact bulk/SOI 10nm FinFETs on 3T1D-DRAM cell performance” 11th IEEE Int. Conf. on Solid-State and Integrated Circuits Technology (ICSICT), 2012, Xi’an, China.
Located in Publications